Solution of interfacing using RAM and ROM both at a time

Solution of interfacing using RAM and ROM both at a time.

As we know that a data is stored only in one memory location and we also know that a data is received or transmittted through only one memory at a time. It means only one memory will be processing at a time. So RAM and ROM are connected to the same address lines. As you can see in the figure that a NOT gate has been used here. It will select only one memory at a time.

A0 to A14 pins is connected to ROM and A0 to A15 pins is connected to RAM. Pin A15 has been used for selecting the memory either it will use RAM or ROM.

Control And Status Signal

Control And Status Signal:-
S0 and S1:-It is used for the status signal in microprocessor.

ALE(Airthmetic Latch Enable):-This signal is used to capture the lower address presented on multiplexed address and data bus.

RD:-This is active low input generally
 used for reading operation.

WR:-This is active low input used for writing operation.

IO/M:-This pin is used to select the memory or input-output through which we want to communicate the data.

READY:-As we know that memory and input -output have slower response than microprocessor. So a microprocessor may now be able to handle further data till it completes the present job. So it is in waiting state. As it completes the present job it sets the READY pin. Microprocessor enters into wait state while READY pin is disabled.
RESET IN:-This is active low input. This pin is used to reset the microprocessor. An active low signal applied to this pin reset the program counter inside the microprocessor. The busses are tristated.
RESETOUT:-If we want to reset the external devices connected to the microprocessor then a signal applied to this pin resets the external devices.


DMA Request Signal:
HOLD and HLDA:-HOLD is an active high input signal used by the other controller to request microprocessor about use of address, data and control signal. The HOLD and HLDA signal are used for direct memory access(DMA). DMA controller receives a requests from a device and in turn issues the HOLD signal to the microprocessor.
The processor releases the system bus and then acknowledges the HOLD signal with HLDA signal. The DMA transfer thus begins.

Latch pulse and Clock pulse

Latch: A bistable circuit that is set and reset by appropriate input signals. An electronic circuit that records the status of a signal until it is reset. A latch is a kind of bistable multivibrator, an electronic circuit which has two stable states and thereby can store one bit of information. Today the word is mainly used for simple transparent storage elements.

Clock Pulse: A synchronization signal provided by a clock. A periodic signal used for

synchronization and for measuring intervals of time.